2016년 3월 8일 화요일

Hideo mem set


bios setting:6320
Ai Overclock Tuner [Manual]
BCLK Frequency [102.70]
ASUS MultiCore Enhancement [Auto]
CPU Core Ratio [Sync All Cores]
1-Core Ratio Limit [39]
2-Core Ratio Limit [39]
DRAM Odd Ratio Mode [Enabled]
DRAM Frequency [DDR4-3834MHz]
Xtreme Tweaking [Enabled]
TPU [Keep Current Settings]
EPU Power Saving Mode [Disabled]
CPU SVID Support [Disabled]
CPU Core/Cache Current Limit Max. [255.50]
Min. CPU Cache Ratio [39]
Max CPU Cache Ratio [39]
CPU Core/Cache Voltage [Manual Mode]
CPU Core Voltage Override [1.150]
DRAM Voltage [1.9350]
CPU VCCIO Voltage [1.12500]
CPU System Agent Voltage [1.25000]
PCH Core Voltage [Auto]
CPU Standby Voltage [Auto]

Initial BCLK Frequency [Auto]
BCLK Amplitude [Auto]
BCLK Slew Rate [Auto]
BCLK Spread Spectrum [Disabled]
BCLK Frequency Slew Rate [Auto]
DRAM VTT Voltage [Auto]
VPPDDR Voltage [Auto]
DMI Voltage [Auto]
Core PLL Voltage [Auto]
Internal PLL Voltage [Auto]
PLL Bandwidth [Auto]
Eventual DRAM Voltage [Auto]
Eventual CPU Standby Voltage [Auto]
--------------------------------------------
Maximus Tweak [Mode 2]
DRAM CAS# Latency [12]
DRAM RAS# to CAS# Delay [18]
DRAM RAS# ACT Time [28]
DRAM Command Rate [1]

DRAM RAS# to RAS# Delay L [12]
DRAM RAS# to RAS# Delay S [8]
DRAM REF Cycle Time [278]
DRAM Refresh Interval [15500]
DRAM WRITE Recovery Time [12]
DRAM READ to PRE Time [6]
DRAM FOUR ACT WIN Time [16]
DRAM WRITE to READ Delay [6]
DRAM WRITE to READ Delay L [6]
DRAM WRITE to READ Delay S [4]
DRAM CKE Minimum Pulse Width [4]
DRAM Write Latency [13]

tRDRD_sg [7]
tRDRD_dg [4]
tRDWR_sg [8]
tRDWR_dg [8]
tWRWR_sg [7]
tWRWR_dg [4]
tWRRD_sg [Auto]
tWRRD_dg [Auto]
tRDRD_dr [Auto]
tRDRD_dd [Auto]
tRDWR_dr [Auto]
tRDWR_dd [Auto]
tWRWR_dr [7]
tWRWR_dd [7]
tWRRD_dr [Auto]
tWRRD_dd [Auto]
TWRPRE [Auto]
TRDPRE [Auto]
tREFIX9 [Auto]
OREF_RI [Auto]
----------------------------------------------
MRC Fast Boot [Enabled]
DRAM CLK Period [24]
Memory Scrambler [Enabled]
Channel A DIMM Control [Enable both DIMMs]
Channel B DIMM Control [Enable both DIMMs]
MCH Full Check [Disabled]
DLLBwEn [3]
DRAM SPD Write [Disabled]
XTU Setting [Auto]
----------------------------------------------
CHA IO_Latency_offset [Auto]
CHB IO_Latency_offset [Auto]
CHA RFR delay [Auto]
CHB RFR delay [Auto]
----------------------------------------------
CPU Load-line Calibration [Level 4]
CPU Current Capability [140%]
CPU VRM Switching Frequency [Manual]
Fixed CPU VRM Switching Frequency(KHz) [500]
CPU Power Duty Control [Extreme]
CPU Power Phase Control [Extreme]
CPU Power Thermal Control [131]
DRAM Current Capability [130%]
DRAM Power Phase Control [Extreme]
DRAM Switching Frequency [Manual]
Fixed DRAM Switching Frequency(KHz) [500]
----------------------------------------------
CPU Core/Cache Boot Voltage [Auto]
DMI Boot Voltage [Auto]
Core PLL Boot Voltage [Auto]
CPU System Agent Boot Voltage [Auto]
CPU VCCIO Boot Voltage [Auto]
Intel(R) SpeedStep(tm) [Disabled]
Long Duration Package Power Limit [4095]
Package Power Time Window [Auto]
Short Duration Package Power Limit [4095]
IA AC Load Line [Auto]
IA DC Load Line [Auto]

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